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关于AD9910低温下加电异常技术咨询

林一凡 在 2018-5-22 詢問的問題
最後回覆由ternence於2018-5-23提供

关于AD9910低温下加电异常技术咨询

(Help needed regarding the fault of AD9910 at power-on in low temperature condition)

现象描述:低温下(-40~0℃)AD9910反复加电30次左右出现一次故障,无输出信号。AD9910仅使用分频功能,参考为480M单音信号,输出为26~30M单音信号。

(Fault description: AD9910 is used for frequency-dividing, with reference input of 480MHz, and output of 26~30MHz single tone signal. There is one fault ( with no output signal) out of 30 times at time of  power-on in low temperature-40~0℃) )

使用通用SPI控制发数,SCLK,SDIOI/O_UPDAT时序如下:

Data was sent by general SPI interface, and the timing sequence of SCLK,SDIO Vs. I/O_UPDAT is as follows:

  红色是SCLK,黄色是SDIO,绿色是I/O_UPDAT

  red-SCLK, yellow-SDIO, green- I/O_UPDAT

上图展开

观测SCLKI/O_UPDAT交汇点。

watching the intersection of SCLK and I/O_UPDAT

咨询1:请问SCLKSDIOI/O_UPDAT如上图配置是否存在问题?

question 1: Is the parameter setting-up of  SCLKSDIO Vs. I/O_UPDAT is correct as being shown above

SCLKI/O_UPDAT时序改为如下后低温未出现故障现象。

when the timing sequence was changed as being shown followed, there was no fault at time of power-on in low temperature.

黄色为SCLK,绿色为I/O_UPDAT

yellow--SCLK, green--I/O_UPDAT

I/O_UPDAT在时钟完成2个周期后在置高

Once the I/O_UPDAT was set to high after 2 periods of SCLK, there was no fault at time of power-on in low temperature.  our second question was: is there a delay required for I/O_UPDAT regarding SCLK signal? if yes, how to set up the time delay?

咨询2:更改时序后未出现故障,是否因为I/O_UPDATSCLK之间要求有延时,请问延时如何控制?

結果