已回答假定已回答

ADF4002  MUXOUT无法输出高电平!

Zigbee2012 在 2013-5-22 詢問的問題
最後回覆由adi_yu於2013-5-29提供

是时序问题,还是板子有问!!

通过配置 REFERENCE COUNTER LATCH (0X010004)、N COUNTER LATCH (0X000101)、FUNCTION LATCH(0X1FF8B2) 、INITIALIZATION LATCH(0X1FF8B3)四个寄存器的,但MUXOUT没有输出高电平

 

具体程序

void delay(uint n)

{

  uchar dly=100;

while(n--){while(dly--);};

}

void ADF4002_Init()

{

ADF4002_LE_1;//

ADF4002_CLK_0;//

        delay(10);

ADF4002_CE_0;//

delay(10);

ADF4002_CE_1;//

delay(10);

 

}

 

void ADF4002_Load(uchar *Rdata)

{

 

    uchar Bit, Byte, temp;

 

ADF4002_LE_0;//ADF4002_LE = 0;                                        //set Load ENable low, to clock in data.

        ADF4002_CLK_0;//ADF4002_CLK = 0;                                   //set CLK low

        for (Byte = 3; Byte; Byte--)

        {                                                       //Clock In MS Byte To LS Byte.

          Bit = 0x80;

          while (Bit)

          {

 

            temp = Rdata[Byte-1]&Bit;

            if (temp>0)    ADF4002_DATA_1; //

            else      ADF4002_DATA_0;//

 

            ADF4002_CLK_1;//

            Bit /= 2;

            delay(10);

            ADF4002_CLK_0;//

          }

        }

        ADF4002_LE_1;//

 

}

 

 

void ADF4002_Control()

{

  uchar PllReg[3];

 

 

  //INITIALIZATION REGISTER. The last two bits of data[0] is 11.

  PllReg[2] = 0x1f;//MS-LS: 0001 1111 1000 0000 1000 0011

  PllReg[1] = 0xF8;

  PllReg[0] = 0xB3;

  ADF4002_Load(PllReg);

 

  //FUNCTION REGISTER. The last two bits of data[0] is 10.

  PllReg[2] = 0x1f;//MS-LS: 0001 1111 1000 0000 1000 0010

  PllReg[1] = 0xF8;//R DIV

  PllReg[0] = 0xB2;

  ADF4002_Load(PllReg);

 

  //R-COUNTER REGISTER. The last two bits of data[0] is 00.

 

 

void

結果